ATM_RID: 59A6BC72-00FA-11ED-B3EA-0755EF94D6F1

ID: WFAST_System_DiagGRSGen/FS_36.001_POST_Table/50067

SUMMARY:

DESCRIPTION: {SPI 2.0, DY 3.6, LIP 1.0, CS 1.0, DY 5.1} [+Sn, +Sky, +Sky2, +Ps, +Cvo, +Ksk, +Sn2]|x|x|BIOS flash memory Initialization check|Testing BIOS private NVM area in BIOS flash chip.

Checks the BIOS flash accessed through the SPI bus on the SOC. If the NVRAM check fails the code remains displayed.

Additional details from Lijo Poulose: This code is displayed if BIOS detects any issues in reading the variables from SPI  flash and storing it in memory, Insyde confirmed that there is no checksum validation for the NVM variables because this variable can change during runtime. So, the possibilities for post code '3' failures are memory allocation failures and any error in reading the SPI flash. There are less chances that this will happen because BIOS already started running from the SPI flash and initialized the memory before NVM initialize. 

We have no method to reproduce this failure on-demand for QA verification.|3|Off|BIOS|SBC board.|1.024|CQ 760657
DAR-529589
DAR-541628|Replace SBC PWB  PL 3.05/PL3.06

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ATM_MCOMMENTS: Imported from CSV

FILES:

FILENAME:

FILEDESC:

PRODUCT:

EXTERNAL_ID: TC

ATM_LOCKED:

CDATE: 1657531076

ATM_OWNER:

MDATE: 1657531076

MUSER: Q44PY9XD

AUTHOR: Q44PY9XD

ATM_TESTS: ARRAY(0x55b42763b4c0)

ATM_BEST_RESULT:

ATM_WORST_RESULT:

ATM_AVERAGE_RESULT:

ATM_TESTCOUNT: 1

TAG: 36.001.003

PACKET: FT-21975

FS_VERSION: 1.0028

RELEASE: d3.6, d4.0, d5.0, d5.1, d5.3, d5.4, d5.6, d7.4, d7.6, d7.7, d7.8, d7.9, d8.0, d8.1, d8.5, d9.0